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IEEECIT
2010
IEEE
13 years 9 months ago
Exploiting More Parallelism from Applications Having Generalized Reductions on GPU Architectures
Reduction is a common component of many applications, but can often be the limiting factor for parallelization. Previous reduction work has focused on detecting reduction idioms a...
Xiao-Long Wu, Nady Obeid, Wen-Mei Hwu
HPDC
2008
IEEE
14 years 5 months ago
StoreGPU: exploiting graphics processing units to accelerate distributed storage systems
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
Samer Al-Kiswany, Abdullah Gharaibeh, Elizeu Santo...
HIPC
2009
Springer
13 years 9 months ago
Optimizing the use of GPU memory in applications with large data sets
Abstract--With General Purpose programmable GPUs becoming more and more popular, automated tools are needed to bridge the gap between achievable performance from highly parallel ar...
Nadathur Satish, Narayanan Sundaram, Kurt Keutzer
TPDS
2010
174views more  TPDS 2010»
13 years 9 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
IPPS
2008
IEEE
14 years 5 months ago
Wait-free Programming for General Purpose Computations on Graphics Processors
The fact that graphics processors (GPUs) are today’s most powerful computational hardware for the dollar has motivated researchers to utilize the ubiquitous and powerful GPUs fo...
Phuong Hoai Ha, Philippas Tsigas, Otto J. Anshus