87 search results - page 2 / 18 » Exploiting Postdominance for Speculative Parallelization |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Embedded processors have been increasingly exploiting hardware parallelism. Vector units, multiple processors or cores, hyper-threading, special-purpose accelerators such as DSPs ...
TPDS
2010
13 years 6 months ago
2010
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
ISCA
2002
IEEE
13 years 7 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The lag of parallel programming models and languages behind the advance of heterogeneous many-core processors has left a gap between the computational capability of moder...
CC
2009
Springer
14 years 8 months ago
2009
Springer
Speculative parallelisation represents a promising solution to speed up sequential programs that are hard to parallelise otherwise. Prior research has focused mainly on parallelisi...