192 search results - page 25 / 39 » Exploiting Simulation Slack to Improve Parallel Simulation S... |
ISCA
2002
IEEE
14 years 8 days ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
GRID
2004
Springer
14 years 22 days ago
2004
Springer
A computational grid is a wide-area computing environment for cross-domain resource sharing and service integration. Resource management and load balancing are key concerns when i...
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
HIPEAC
2011
Springer
12 years 7 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
PPOPP
2003
ACM
14 years 18 days ago
2003
ACM
Large-scale cluster-based Internet services often host partitioned datasets to provide incremental scalability. The aggregation of results produced from multiple partitions is a f...