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119
Voted
CODES
2009
IEEE
15 years 6 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
SPIN
2000
Springer
15 years 6 months ago
Verification and Optimization of a PLC Control Schedule
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
Ed Brinksma, Angelika Mader
130
Voted
ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 6 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
USS
2008
15 years 4 months ago
Digital Objects as Passwords
Security proponents heavily emphasize the importance of choosing a strong password (one with high entropy). Unfortunately, by design, most humans are apparently incapable of gener...
Mohammad Mannan, Paul C. van Oorschot
114
Voted
USS
2008
15 years 4 months ago
Automatic Generation of XSS and SQL Injection Attacks with Goal-Directed Model Checking
Cross-site scripting (XSS) and SQL injection errors are two prominent examples of taint-based vulnerabilities that have been responsible for a large number of security breaches in...
Michael C. Martin, Monica S. Lam