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ICPP
1999
IEEE
13 years 11 months ago
Parallel Media Processors for the Billion-Transistor Era
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
Jason Fritts, Zhao Wu, Wayne Wolf
NIPS
2003
13 years 8 months ago
From Algorithmic to Subjective Randomness
We explore the phenomena of subjective randomness as a case study in understanding how people discover structure embedded in noise. We present a rational account of randomness per...
Thomas L. Griffiths, Joshua B. Tenenbaum
EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 11 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ICPP
2003
IEEE
14 years 22 days ago
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
Magnus Ekman, Per Stenström
ECOOPWEXCEPTION
2006
Springer
13 years 11 months ago
Exception Handling in the Choices Operating System
Exception handling is a powerful abstraction that can be used to help manage errors and support the construction of reliable operating systems. Using exceptions to notify system co...
Francis M. David, Jeffrey C. Carlyle, Ellick Chan,...