YapOr is an or-parallel system that extends the Yap Prolog system to exploit implicit or-parallelism in Prolog programs. It is based on the environment copying model, as first imp...
In this paper we describe the design and implementation of the VDL Generator, a tool to simplify and automatise the Digital Library development process. In particular, we discuss h...
The right software architecture is critical to achieving essential quality attributes, but these qualities are only realized if the program as implemented conforms to its intended...
The Unified Modeling Language (UML) statechart diagram is used for modeling the dynamic aspects of systems. The UML statechart diagrams include many concepts that are not present ...
Syntax-based vulnerability testing is a static black-box testing method for protocol implementations. It involves testing the Implementation Under Test (IUT) with a large number o...