Sciweavers

4155 search results - page 682 / 831
» External Memory Algorithms
Sort
View
94
Voted
COMPSAC
2010
IEEE
14 years 10 months ago
Minimising the Preparation Cost of Runtime Testing Based on Testability Metrics
Abstract--Test cost minimisation approaches have traditionally been devoted to minimising "execution costs", while maximising coverage or reliability. However, in a runti...
Alberto González-Sanchez, Éric Piel,...
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
14 years 10 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
EGH
2010
Springer
14 years 10 months ago
Architecture considerations for tracing incoherent rays
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
Timo Aila, Tero Karras
107
Voted
ICIP
2010
IEEE
14 years 10 months ago
Reducing graphs in graph cut segmentation
In few years, graph cuts have become a leading method for solving a wide range of problems in computer vision. However, graph cuts involve the construction of huge graphs which so...
Nicolas Lerme, François Malgouyres, Lucas L...
IPPS
2010
IEEE
14 years 10 months ago
Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance
Abstract--Dictionary-based string matching (DBSM) is a critical component of Deep Packet Inspection (DPI), where thousands of malicious patterns are matched against high-bandwidth ...
Yi-Hua E. Yang, Viktor K. Prasanna, Chenqian Jiang