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MTDT
1999
IEEE
68views Hardware» more  MTDT 1999»
14 years 1 months ago
Unbalanced Cache Systems
The new concept of an unbalanced, hierarchicallydivided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different m...
David L. Rhodes, Wayne Wolf
VLSID
1999
IEEE
99views VLSI» more  VLSID 1999»
14 years 1 months ago
Array Index Allocation under Register Constraints in DSP Programs
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
Anupam Basu, Rainer Leupers, Peter Marwedel
EUROMICRO
1998
IEEE
14 years 1 months ago
The Latency Hiding Effectiveness of Decoupled Access/Execute Processors
Several studies have demonstrated that out-of-order execution processors may not be the most adequate organization for wide issue processors due to the increasing penalties that w...
Joan-Manuel Parcerisa, Antonio González
ISHPC
1999
Springer
14 years 1 months ago
Dynamically Adaptive Parallel Programs
Abstract. Dynamic program optimization is the only recourse for optimizing compilers when machine and program parameters necessary for applying an optimization technique are unknow...
Michael Voss, Rudolf Eigenmann
HPCA
1998
IEEE
14 years 1 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...