86 search results - page 4 / 18 » FLAVERS: A finite state verification technique for software ... |
ICSE
2003
IEEE-ACM
14 years 7 months ago
2003
IEEE-ACM
We present a new methodology for automatic verification of C programs against finite state machine specifications. Our approach is compositional, naturally enabling us to decompos...
MEMOCODE
2010
IEEE
13 years 5 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
TAP
2008
Springer
13 years 7 months ago
2008
Springer
Formal methods can only gain widespread use in industrial software development if they are integrated into software development techniques, tools, and languages used in practice. A...
ECBS
2006
IEEE
13 years 11 months ago
2006
IEEE
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
JSS
2006
13 years 7 months ago
2006
Model checking is a powerful automated technique mainly used for the verification of properties of reactive systems. In practice, model checkers are limited due to the state explos...