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HPDC
2007
IEEE
14 years 1 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
GIS
2009
ACM
14 years 8 months ago
Map-Matching for Low-Sampling-Rate GPS Trajectories
Map-matching is the process of aligning a sequence of observed user positions with the road network on a digital map. It is a fundamental pre-processing step for many applications...
Yin Lou, Chengyang Zhang, Yu Zheng, Xing Xie, Wei ...
FPL
2006
Springer
105views Hardware» more  FPL 2006»
13 years 11 months ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
DSRT
2009
IEEE
13 years 10 months ago
An Approach for Parallel Interest Matching in Distributed Virtual Environments
—Interest management is essential for real-time large-scale distributed virtual environments (DVEs) which seeks to filter irrelevant messages on the network. Many existing inter...
Elvis S. Liu, Georgios K. Theodoropoulos
RSP
2008
IEEE
118views Control Systems» more  RSP 2008»
14 years 1 months ago
Functional DIF for Rapid Prototyping
Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
William Plishker, Nimish Sane, Mary Kiemb, Kapil A...