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» FPGA interconnect design using logical effort
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110
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CF
2006
ACM
15 years 9 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...
116
Voted
ARCS
2006
Springer
15 years 7 months ago
Minimising the Hardware Resources for a Cellular Automaton with Moving Creatures
: Given is the following "creature's exploration problem": n creatures are moving around in an unknown environment in order to visit all cells in shortest time. This...
Mathias Halbach, Rolf Hoffmann
119
Voted
ISSA
2004
15 years 5 months ago
High Data Rate 8-Bit Crypto Processor
This paper describes a high data rate 8-bit Crypto Processor based on Advanced Encryption Standard (Rijndael algorithm). Though the algorithm requires 32-bit wide data path but ou...
Sheikh Muhammad Farhan
116
Voted
WECWIS
2002
IEEE
112views ECommerce» more  WECWIS 2002»
15 years 8 months ago
Separating Business Process from User Interaction Utilizing Process-Aware XSLT Style-Sheets
In the web context, it is difficult to disentangle presentation from process logic, and sometimes even data is not separate from the presentation. Consequently, it becomes to de...
Karl Aberer, Anwitaman Datta, Zoran Despotovic
137
Voted
LISA
2004
15 years 5 months ago
Auto-configuration by File Construction: Configuration Management with newfig
A tool is described that provides for the automatic configuration of systems from a single description. The tool, newfig, uses two simple concepts to provide its functionality: bo...
William LeFebvre, David Snyder