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CAV
2004
Springer
108views Hardware» more  CAV 2004»
14 years 3 months ago
DPLL( T): Fast Decision Procedures
The logic of equality with uninterpreted functions (EUF) and its extensions have been widely applied to processor verification, by means of a large variety of progressively more s...
Harald Ganzinger, George Hagen, Robert Nieuwenhuis...
CL
2000
Springer
14 years 2 months ago
Modelling Digital Circuits Problems with Set Constraints
A number of diagnostic and optimisation problems in Electronics Computer Aided Design have usually been handled either by specific tools or by mapping them into a general problem s...
Francisco Azevedo, Pedro Barahona
VMCAI
2005
Springer
14 years 3 months ago
Minimizing Counterexample with Unit Core Extraction and Incremental SAT
Abstract. It is a hotly researching topic to eliminate irrelevant variables from counterexample, to make it easier to be understood. K Ravi proposes a two-stages counterexample min...
ShengYu Shen, Ying Qin, Sikun Li
FROCOS
2007
Springer
14 years 1 months ago
From KSAT to Delayed Theory Combination: Exploiting DPLL Outside the SAT Domain
In the last two decades we have witnessed an impressive advance in the efficiency of propositional satisfiability techniques (SAT), which has brought large and previously-intractab...
Roberto Sebastiani
CORR
2006
Springer
95views Education» more  CORR 2006»
13 years 10 months ago
SAT Solving for Argument Filterings
Abstract. This paper introduces a propositional encoding for lexicographic path orders in connection with dependency pairs. This facilitates the application of SAT solvers for term...
Michael Codish, Peter Schneider-Kamp, Vitaly Lagoo...