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ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
14 years 1 months ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee
VLSISP
2008
173views more  VLSISP 2008»
13 years 7 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee
JEI
2000
133views more  JEI 2000»
13 years 7 months ago
Low complexity block motion estimation using morphological-based feature extraction and XOR operations
Motion estimation is a temporal image compression technique, where an n x n block of pixels in the current frame of a video sequence is represented by a motion vector with respect...
Thinh M. Le, R. Mason, Sethuraman Panchanathan