406 search results - page 4 / 82 » Fast Increment Registers |
ICML
2003
IEEE
14 years 10 months ago
2003
IEEE
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper proposes and evaluates a new microarchitecture for out-of-order processors that supports speculative renaming. We call speculative renaming to the speculative omission ...
PODC
2009
ACM
14 years 10 months ago
2009
ACM
A method is given for constructing a max register, a linearizable, wait-free concurrent data structure that supports a write operation and a read operation that returns the larges...
SPAA
2006
ACM
14 years 3 months ago
2006
ACM
This paper investigates time-efficient implementations of atomic read-write registers in message-passing systems where the number of readers can be unbounded. In particular we st...
ARCS
2010
Springer
14 years 2 months ago
2010
Springer
Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that ...