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» Fault Analysis of a Distributed Flight Control System
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DFT
2005
IEEE
178views VLSI» more  DFT 2005»
14 years 2 months ago
Inter-Plane Via Defect Detection Using the Sensor Plane in 3-D Heterogeneous Sensor Systems
Defect and fault tolerance is being studied in a 3D Heterogeneous Sensor using a stacked chip with sensors located on the top plane, and inter-plane vias connecting these to other...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali
ECRTS
2002
IEEE
14 years 1 months ago
Weakly Hard Real-time Constraints on Controller Area Network
For priority based buses such as CAN, worst case response time analysis is able to determine whether messages always meet their deadlines. This can include system models with boun...
Ian Broster, Guillem Bernat, Alan Burns
FLAIRS
2001
13 years 10 months ago
Autonomy for SOHO Ground Operations
/Background The SOLAR and HELIOSPHERIC OBSERVATORY (SOHO) project [SOHO Web Page] is being carried out by the European Space Agency (ESA) and the US National Aeronautics and Space ...
Walt Truszkowski, Nick Netreba, Don Ginn, Sanda Ma...
ADAEUROPE
2005
Springer
14 years 2 months ago
Non-intrusive System Level Fault-Tolerance
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...
Kristina Lundqvist, Jayakanth Srinivasan, Sé...
IPPS
2000
IEEE
14 years 1 months ago
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
Diana Hecht, Constantine Katsinis