Sciweavers

46 search results - page 8 / 10
» Fault Avoidance in Medium-Grain Reconfigurable Hardware Arch...
Sort
View
IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
14 years 21 days ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
EH
2000
IEEE
156views Hardware» more  EH 2000»
14 years 5 days ago
Evolution of Analog Circuits on Field Programmable Transistor Arrays
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...
Adrian Stoica, Didier Keymeulen, Ricardo Salem Zeb...
DSN
2003
IEEE
14 years 1 months ago
Integrating Recovery Strategies into a Primary Substation Automation System
The DepAuDE architecture provides middleware to integrate fault tolerance support into distributed embedded automation applications. It allows error recovery to be expressed in te...
Geert Deconinck, Vincenzo De Florio, Ronnie Belman...
CII
2006
141views more  CII 2006»
13 years 7 months ago
FPGA-based tool path computation: An application for shoe last machining on CNC lathes
Tool path generation is one of the most complex problems in Computer Aided Manufacturing. Although some efficient strategies have been developed, most of them are only useful for s...
Antonio Jimeno, José Luis Sánchez, H...
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 5 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...