The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
Model checking is shown to be an effective tool in validating the behavior of a fault tolerant embedded spacecraft controller. The case study presented here at by judiciously abst...
Francis Schneider, Steve M. Easterbrook, John R. C...
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Exception handling is one of the popular means used for improving dependability and supporting recovery in the ServiceOriented Architecture (SOA). This practical experience paper ...
Anatoliy Gorbenko, Alexander Romanovsky, Vyachesla...