In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
Modern microprocessors get more and more susceptible to transient faults, e.g. caused by high-energetic particles due to high integration, clock frequencies, temperature and decre...
A long-term trend in high-performance computing is the increasing number of nodes in parallel computing platforms, which entails a higher failure probability. Fault tolerant progr...
In this paper we consider general simulations of algorithms designed for fully operational BSP and CGM machines on machines with faulty processors. The faults are deterministic (i...
Many existing clusters use inexpensive Gigabit Ethernet and often have multiple interfaces cards to improve bandwidth and enhance fault tolerance. We investigate the use of Concurr...
Brad Penoff, Mike Tsai, Janardhan R. Iyengar, Alan...