A connection management protocol establishes a connection between two hosts across a wide-area network to allow reliable message delivery. Following previous work of Kleinberg et a...
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
Recently, a server-less video-on-demand architecture has been proposed which can completely eliminate costly dedicated video servers and yet is highly scalable and reliable. Due to...
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...