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FCT
1997
Springer
13 years 11 months ago
Trade-Off Results for Connection Management
A connection management protocol establishes a connection between two hosts across a wide-area network to allow reliable message delivery. Following previous work of Kleinberg et a...
Marios Mavronicolas, Nikos Papadakis
ENTCS
2006
176views more  ENTCS 2006»
13 years 7 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
EUROPAR
2003
Springer
14 years 27 days ago
On Transmission Scheduling in a Server-Less Video-on-Demand System
Recently, a server-less video-on-demand architecture has been proposed which can completely eliminate costly dedicated video servers and yet is highly scalable and reliable. Due to...
C. Y. Chan, Jack Y. B. Lee
DAC
2004
ACM
14 years 8 months ago
A method for correcting the functionality of a wire-pipelined circuit
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Vidyasagar Nookala, Sachin S. Sapatnekar
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 4 months ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...