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EURODAC
1995
IEEE
202views VHDL» more  EURODAC 1995»
13 years 11 months ago
Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems
Distributed systems are becoming a popular way of implementing many embedded computing applications, automotive control being a common and important example. Such embedded systems...
Santhanam Srinivasan, Niraj K. Jha
SC
2005
ACM
14 years 1 months ago
Transparent, Incremental Checkpointing at Kernel Level: a Foundation for Fault Tolerance for Parallel Computers
We describe the software architecture, technical features, and performance of TICK (Transparent Incremental Checkpointer at Kernel level), a system-level checkpointer implemented ...
Roberto Gioiosa, José Carlos Sancho, Song J...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ESCIENCE
2007
IEEE
14 years 2 months ago
Intelligent Selection of Fault Tolerance Techniques on the Grid
The emergence of computational grids has lead to an increased reliance on task schedulers that can guarantee the completion of tasks that are executed on unreliable systems. There...
Daniel C. Vanderster, Nikitas J. Dimopoulos, Randa...
IPPS
1998
IEEE
13 years 12 months ago
Hyper Butterfly Network: A Scalable Optimally Fault Tolerant Architecture
Boundeddegreenetworks like deBruijn graphsor wrapped butterfly networks are very important from VLSI implementation point of view as well as for applications where the computing n...
Wei Shi, Pradip K. Srimani