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DFT
2006
IEEE
74views VLSI» more  DFT 2006»
14 years 1 months ago
Recovery Mechanisms for Dual Core Architectures
Dual core architectures are commonly used to establish fault tolerance on the node level. Since comparison is usually performed for the outputs only, no precise diagnostic informa...
Christian El Salloum, Andreas Steininger, Peter Tu...
DSN
2006
IEEE
14 years 1 months ago
Dependability Analysis of Virtual Memory Systems
Recent research has shown that even modern hard disks have complex failure modes that do not conform to “failstop” operation. Disks exhibit partial failures like block access ...
Lakshmi N. Bairavasundaram, Andrea C. Arpaci-Dusse...
ISSRE
2006
IEEE
14 years 1 months ago
Web Application Testing with Customized Test Requirements - An Experimental Comparison Study
Test suite reduction uses test requirement coverage to determine if the reduced test suite maintains the original suite’s requirement coverage. Based on observations from our pr...
Sreedevi Sampath, Sara Sprenkle, Emily Gibson, Lor...
ISCA
2002
IEEE
128views Hardware» more  ISCA 2002»
14 years 14 days ago
Detailed Design and Evaluation of Redundant Multithreading Alternatives
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient f...
Shubhendu S. Mukherjee, Michael Kontz, Steven K. R...
DSN
2000
IEEE
13 years 12 months ago
An Automatic SPIN Validation of a Safety Critical Railway Control System
This paper describes an experiment in formal specification and validation performed in the context of an industrial joint project. The project involved an Italian company working...
Stefania Gnesi, Diego Latella, Gabriele Lenzini, C...