376 search results - page 26 / 76 » Feedback-Directed Random Test Generation |
ITC
1994
IEEE
13 years 12 months ago
1994
IEEE
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
DSD
2005
IEEE
13 years 9 months ago
2005
IEEE
Several methods improving the fault coverage in mixed-mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of f...
VTS
1997
IEEE
14 years 14 hour ago
1997
IEEE
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
ICSE
2010
IEEE-ACM
14 years 18 days ago
2010
IEEE-ACM
Due to the expensiveness of compiling and executing a large number of mutants, it is usually necessary to select a subset of mutants to substitute the whole set of generated mutan...
ICST
2010
IEEE
13 years 5 months ago
2010
IEEE
Mobile computing systems provide new challenges for verification. One of them is the dynamicity of the system structure, with mobility-induced connections and disconnections, dynam...