130 search results - page 5 / 26 » Finding and Certifying Loops |
IPPS
1996
IEEE
13 years 11 months ago
1996
IEEE
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
ECRTS
2003
IEEE
14 years 6 days ago
2003
IEEE
Advances in scheduling theory have given designers of control systems greater flexibility over their choice of timing requirements. This could lead to systems becoming more respon...
LCPC
1998
Springer
1998
Springer
A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality
13 years 11 months ago
We present a cache locality optimization technique that can optimize a loop nest even if the arrays referenced have different layouts in memory. Such a capability is required for a...
ASIAN
2006
Springer
13 years 10 months ago
2006
Springer
Abstract. It is customary to write performance-critical parts of arithmetic functions in assembly: this enables finely-tuned algorithms that use specialized processor instructions....
DAC
2012
ACM
11 years 9 months ago
2012
ACM
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...