103 search results - page 6 / 21 » Fine-grained power management for multithreaded processor co... |
DELTA
2008
IEEE
14 years 2 months ago
2008
IEEE
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
HIPC
2009
Springer
13 years 5 months ago
2009
Springer
Recently proposed techniques for peak power management [18] involve centralized decisionmaking and assume quick evaluation of the various power management states. These techniques...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Power consumption is a primary concern for microprocessor designers. Lowering the supply voltage of processors is one of the most effective techniques for improving their energy e...
IWOMP
2007
Springer
14 years 1 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
TCAD
2008
13 years 7 months ago
2008
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...