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CODES
2009
IEEE
13 years 8 months ago
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis
ISSTA
2006
ACM
14 years 1 months ago
DSD-Crasher: a hybrid analysis tool for bug finding
DSD-Crasher is a bug finding tool that follows a three-step approach to program analysis: D. Capture the program’s intended execution behavior with dynamic invariant detection....
Christoph Csallner, Yannis Smaragdakis
CISIS
2010
IEEE
14 years 2 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
ASE
2005
137views more  ASE 2005»
13 years 7 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund
ISSTA
2006
ACM
14 years 1 months ago
Test input generation for java containers using state matching
The popularity of object-oriented programming has led to the wide use of container libraries. It is important for the reliability of these containers that they are tested adequate...
Willem Visser, Corina S. Pasareanu, Radek Pel&aacu...