475 search results - page 60 / 95 » Formal Analysis of Processor Timing Models |
DSRT
1999
IEEE
14 years 2 months ago
1999
IEEE
This paper describes a variant of the actor model suited to the development of multimedia systems. The actor model centers on non-overkilling concurrency and customizable constrai...
ASPDAC
2001
ACM
14 years 1 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
JACM
2000
13 years 9 months ago
2000
We identify and study a natural and frequently occurring subclass of Concurrent Read, Exclusive Write Parallel Random Access Machines (CREW-PRAMs). Called Concurrent Read, Owner Wr...
ICPADS
1994
IEEE
14 years 1 months ago
1994
IEEE
Testingthe performance scalabilityof parallelprograms can be a time consuming task, involving many performance runs for different computer configurations, processor numbers, and p...
CJ
2006
13 years 9 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...