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» Formal Analysis of UML-Based Designs
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FORMATS
2007
Springer
13 years 11 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
MEMOCODE
2003
IEEE
14 years 20 days ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
ICCS
2003
Springer
14 years 18 days ago
Formalizing Botanical Taxonomies
Because botanical taxonomies are prototypical classifications it would seem that it should be easy to formalize them as concept lattices or type hierarchies. On closer inspection,...
Uta Priss
FDL
2006
IEEE
14 years 1 months ago
Formalizing TLM with Communicating State Machines
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
Bernhard Niemann, Christian Haubelt
KCAP
2003
ACM
14 years 20 days ago
Modularisation of domain ontologies implemented in description logics and related formalisms including OWL
Modularity is a key requirement for large ontologies in order to achieve re-use, maintainability, and evolution. Mechanisms for ‘normalisation’ to achieve analogous aims are s...
Alan L. Rector