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FDL
2004
IEEE
14 years 6 days ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
EMSOFT
2009
Springer
14 years 3 months ago
Analytic real-time analysis and timed automata: a hybrid method for analyzing embedded real-time systems
This paper advocates a strict compositional and hybrid approach for obtaining key (performance) metrics of embedded At its core the developed methodology abstracts system componen...
Kai Lampka, Simon Perathoner, Lothar Thiele
FMCAD
2004
Springer
14 years 6 days ago
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...
Thao Dang, Alexandre Donzé, Oded Maler
ENTCS
2007
143views more  ENTCS 2007»
13 years 8 months ago
Formal Fault Tree Analysis - Practical Experiences
Safety is an important requirement for many modern systems. To ensure safety of complex critical systems, well-known safety analysis methods have been formalized. This holds in pa...
Frank Ortmeier, Gerhard Schellhorn
ISOLA
2004
Springer
14 years 1 months ago
Embedding Finite Automata within regular Expressions
Abstract. Regular expressions and their extensions have become a major component of industry-standard specification languages such as PSL/Sugar ([2]). The model checking procedure...
Shoham Ben-David, Dana Fisman, Sitvanit Ruah