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» Formal Development of Reactive Fault Tolerant Systems
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DSD
2008
IEEE
79views Hardware» more  DSD 2008»
14 years 2 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
SEKE
2009
Springer
14 years 8 days ago
Collaborative Development of System Architecture - a Tool for Coping with Inconsistency
Very large systems have an architecture that is designed to allow them to evolve through a long life. Such systems are developed by teams of architects. One of the first things t...
Peter Henderson, Matthew J. Henderson
SOSP
2007
ACM
14 years 4 months ago
Attested append-only memory: making adversaries stick to their word
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limit...
Byung-Gon Chun, Petros Maniatis, Scott Shenker, Jo...
HOPL
2007
13 years 11 months ago
Statecharts in the making: a personal account
This paper is a highly personal and subjective account of how the language of statecharts came into being. The main novelty of the language is in being a fully executable visual f...
David Harel
MODELS
2007
Springer
14 years 1 months ago
Statechart Development Beyond WYSIWYG
Modeling systems based on semi-formal graphical formalisms, such as Statecharts, have become standard practice in the design of reactive embedded devices. Statecharts are often mor...
Steffen Prochnow, Reinhard von Hanxleden