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» Formal Methods in Industrial Software Standards Enforcement
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MEMOCODE
2010
IEEE
13 years 5 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
FMCAD
2006
Springer
13 years 11 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
ICSE
2000
IEEE-ACM
13 years 11 months ago
Verification of time partitioning in the DEOS scheduler kernel
This paper describes an experiment to use the Spin model checking system to support automated verification of time partitioning in the Honeywell DEOS real-time scheduling kernel. ...
John Penix, Willem Visser, Eric Engstrom, Aaron La...
IWPC
2008
IEEE
14 years 1 months ago
Ensuring Well-Behaved Usage of APIs through Syntactic Constraints
Libraries are the most widespreaded form of software reuse. In order to properly use a library API, its clients should fulfill a series of (many times implicit) assumptions made ...
Martin Feilkas, Daniel Ratiu
EMSOFT
2007
Springer
13 years 11 months ago
Verification of device drivers and intelligent controllers: a case study
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
David Monniaux