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» Formal Models for Embedded System Design
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FMCAD
2007
Springer
13 years 11 months ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra
RSP
2006
IEEE
125views Control Systems» more  RSP 2006»
14 years 1 months ago
Creation and Validation of Embedded Assertion Statecharts
This paper addresses the need to integrate formal assertions into the modeling, implementation, and testing of statechart based designs. The paper describes an iterative process f...
Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Dem...
DSVIS
1998
Springer
14 years 2 days ago
Pragmatic Formal Design: A Case Study in Integrating Formal Methods into the HCI Development Cycle
Formal modelling, in interactive system design, has received considerably less real use than might have been hoped. Heavy weight formal methods can be expensive to use, with poor c...
Meurig Sage, Chris Johnson
VLSID
1999
IEEE
101views VLSI» more  VLSID 1999»
14 years 4 days ago
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
Ingo Sander, Axel Jantsch
RSP
1999
IEEE
14 years 4 days ago
System Design Validation Using Formal Models
Formal methods are a nice idea, but the size and complexity of real systems means that they are impractical. We propose that a reasonable alternative to attempting to specify and ...
Peter Henderson, Robert John Walters