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» Formal Verification of Gate-Level Computer Systems
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BIRTHDAY
2010
Springer
13 years 7 months ago
Change Management for Heterogeneous Development Graphs
Abstract. The error-prone process of formal specification and verification of large systems requires an efficient, evolutionary formal development approach. Development graphs have...
Serge Autexier, Dieter Hutter, Till Mossakowski
CDC
2008
IEEE
119views Control Systems» more  CDC 2008»
13 years 9 months ago
Formal analysis of timed continuous Petri nets
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (contPN). Specifically, we consider two problems: (1) given an initial set o...
Marius Kloetzer, Cristian Mahulea, Calin Belta, La...
CMSB
2006
Springer
13 years 11 months ago
Compositional Reachability Analysis of Genetic Networks
Genetic regulatory networks have been modeled as discrete transition systems by many approaches, benefiting from a large number of formal verification algorithms available for the ...
Gregor Gößler
COORDINATION
2006
Springer
13 years 11 months ago
A WSDL-Based Type System for WS-BPEL
We tackle the problem of providing rigorous formal foundations to current software engineering technologies for web services. We focus on two of the most used XML-based languages f...
Alessandro Lapadula, Rosario Pugliese, Francesco T...
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
13 years 11 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier