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» Formal Verification of Gate-Level Computer Systems
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COORDINATION
2009
Springer
14 years 8 months ago
Assume-Guarantee Verification of Concurrent Systems
Process algebras are a set of mathematically rigourous languages with well defined semantics that permit modelling behaviour of concurrent and communicating systems. Verification o...
Liliana D'Errico, Michele Loreti
CCS
2008
ACM
13 years 9 months ago
Formal analysis of SAML 2.0 web browser single sign-on: breaking the SAML-based single sign-on for google apps
Single-Sign-On (SSO) protocols enable companies to establish a federated environment in which clients sign in the system once and yet are able to access to services offered by dif...
Alessandro Armando, Roberto Carbone, Luca Compagna...
ICDCSW
2000
IEEE
13 years 11 months ago
Compositional Verification of a Third Generation Mobile Communication Protocol
Model-checking has turned out to be an efficient and relatively easy-to-use technique in the verification of formally described programs. However, there is one major drawback in u...
Sari Leppänen, Matti Luukkainen
SAC
2008
ACM
13 years 7 months ago
A framework for performance evaluation and functional verification in stochastic process algebras
Despite its relatively short history, a wealth of formalisms exist for algebraic specification of stochastic systems. The goal of this paper is to give such formalisms a unifying ...
Hossein Hojjat, Mohammad Reza Mousavi, Marjan Sirj...
IWANN
2001
Springer
13 years 12 months ago
Verifying Properties of Neural Networks
In the beginning of nineties, Hava Siegelmann proposed a new computational model, the Artificial Recurrent Neural Network (ARNN), and proved that it could perform hypercomputation....
Pedro Rodrigues, José Félix Costa, H...