176 search results - page 19 / 36 » Formal Verification of Gate-Level Computer Systems |
CAV
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
SAC
2010
ACM
13 years 5 months ago
2010
ACM
Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...
TAP
2010
Springer
13 years 5 months ago
2010
Springer
Program verification systems based on automated theorem provers rely on user-provided axioms in order to verify domain-specific properties of code. However, formulating axioms corr...
TODAES
1998
13 years 7 months ago
1998
Abstract State Machines (ASMs) provide a sound mathematical basis for the specification and verification of systems. An application of the ASM methodology to the verification of a ...
CACM
2010
13 years 5 months ago
2010
Certified software consists of a machine-executable program plus a formal machine-checkable proof that the software is free of bugs with respect to a claim of dependability. The c...