216 search results - page 10 / 44 » Formal Verification of Safety Properties in Timed Circuits |
FMICS
2008
Springer
13 years 9 months ago
2008
Springer
There has been relatively little work on the implementability of timing requirements. We have previously provided definitions of fundamental timing operators that explicitly consid...
SIGSOFT
2007
ACM
14 years 8 months ago
2007
ACM
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
CACM
2010
13 years 7 months ago
2010
We report on the formal, machine-checked verification of microkernel from an abstract specification down to its C implementation. We assume correctness of compiler, assembly code,...
RTS
2008
13 years 7 months ago
2008
The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. Th...
ISORC
2000
IEEE
13 years 11 months ago
2000
IEEE
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...