Sciweavers

216 search results - page 18 / 44
» Formal Verification of Safety Properties in Timed Circuits
Sort
View
FORMATS
2007
Springer
13 years 11 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
SRDS
1999
IEEE
13 years 12 months ago
Formal Hazard Analysis of Hybrid Systems in cTLA
Hybrid systems like computer-controlled chemical plants are typical safety critical distributed systems. In present practice, the safety of hybrid systems is guaranteed by hazard ...
Peter Herrmann, Heiko Krumm
WIA
2000
Springer
13 years 11 months ago
Generalizing the Discrete Timed Automaton
Abstract. We describe a general automata-theoretic approach for analyzing the verification problems (binary reachability, safety, etc.) of discrete timed automata augmented with va...
Oscar H. Ibarra, Jianwen Su
SAFECOMP
2007
Springer
14 years 1 months ago
Modeling and Automatic Failure Analysis of Safety-Critical Systems Using Extended Safecharts
With the rapid progress in science and technology, we find ubiquitous use of safety-critical systems in avionics, consumer electronics, and medical instruments. In such systems, u...
Yean-Ru Chen, Pao-Ann Hsiung, Sao-Jie Chen
SIGSOFT
2001
ACM
14 years 8 months ago
Combining UML and formal notations for modelling real-time systems
This article explores a dual approach to real-time software development. Models are written in UML, as this is expected to be relatively easy and economic. Then models are automat...
Luigi Lavazza, Gabriele Quaroni, Matteo Venturelli