216 search results - page 35 / 44 » Formal Verification of Safety Properties in Timed Circuits |
SAS
2005
Springer
14 years 29 days ago
2005
Springer
A technique for generating invariant polynomial inequalities of bounded degree is presented using the abstract interpretation framework. It is based on overapproximating basic semi...
ICECCS
1999
IEEE
13 years 11 months ago
1999
IEEE
We report on our efforts to formally specify and verify a new protocol of the E-2C Hawkeye Early Warning Aircraft. The protocol, which is currently in test at Northrop Grumman, su...
FMCAD
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
LOGCOM
2010
13 years 2 months ago
2010
Perfect pre-deployment test coverage is notoriously difficult to achieve for large applications. Given enough end users, however, many more test cases will be encountered during a...
IFM
2010
Springer
13 years 5 months ago
2010
Springer
Safe is a first-order eager functional language with facilities for programmer controlled destruction and copying of data structures. It provides also regions, i.e. disjoint parts...