Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocate...
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
: The IC test industry has struggled .for more than 30years to establish a test approach that would guarantee a low defect level to the customer. Wepropose a comprehensive strategy...
Charles F. Hawkins, Jerry M. Soden, Alan W. Righte...
Abstract. Component-based architectures are widely used in embedded systems. For managing complexity and improving quality separation of concerns is one of the most important princ...