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» Formal analysis of hardware requirements
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FPL
1995
Springer
106views Hardware» more  FPL 1995»
14 years 1 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
CAV
2010
Springer
173views Hardware» more  CAV 2010»
14 years 1 months ago
A Model Checker for AADL
We present a graphical toolset for verifying AADL models, which are gaining widespread acceptance in aerospace, automobile and avionics industries for comprehensively specifying sa...
Marco Bozzano, Alessandro Cimatti, Joost-Pieter Ka...
ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
14 years 11 days ago
Analytical model for the impact of multiple input switching noise on timing
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
Rajeshwary Tayade, Sani R. Nassif, Jacob A. Abraha...
ASPDAC
2010
ACM
135views Hardware» more  ASPDAC 2010»
13 years 8 months ago
Statistical timing verification for transparently latched circuits through structural graph traversal
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Xingliang Yuan, Jia Wang
PLDI
2010
ACM
14 years 24 days ago
DRFX: a simple and efficient memory model for concurrent programming languages
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...
Daniel Marino, Abhayendra Singh, Todd D. Millstein...