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» Formal analysis of hardware requirements
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IPPS
2006
IEEE
14 years 2 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 2 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
GECCO
2009
Springer
14 years 2 months ago
On the performance effects of unbiased module encapsulation
A recent theoretical investigation of modular representations shows that certain modularizations can introduce a distance bias into a landscape. This was a static analysis, and em...
R. Paul Wiegand, Gautham Anil, Ivan I. Garibay, Oz...
ATVA
2006
Springer
109views Hardware» more  ATVA 2006»
13 years 10 months ago
Proactive Leader Election in Asynchronous Shared Memory Systems
Abstract. In this paper, we give an algorithm for fault-tolerant proactive leader election in asynchronous shared memory systems, and later its formal verification. Roughly speakin...
M. C. Dharmadeep, K. Gopinath
SIGMETRICS
2010
ACM
193views Hardware» more  SIGMETRICS 2010»
13 years 8 months ago
Distributed caching over heterogeneous mobile networks
Sharing content over a mobile network through opportunistic contacts has recently received considerable attention. In proposed scenarios, users store content they download in a lo...
Stratis Ioannidis, Laurent Massoulié, Augus...