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» Formal analysis of hardware requirements
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CORR
2008
Springer
144views Education» more  CORR 2008»
13 years 9 months ago
Modular Compilation of a Synchronous Language
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
Annie Ressouche, Daniel Gaffé, Valér...
ECBS
2010
IEEE
224views Hardware» more  ECBS 2010»
14 years 4 months ago
Timed Automata Model for Component-Based Real-Time Systems
—One of the key challenges in modern real-time embedded systems is safe composition of different software components. Formal verification techniques provide the means for design...
Georgiana Macariu, Vladimir Cretu
SIGMETRICS
2008
ACM
130views Hardware» more  SIGMETRICS 2008»
13 years 9 months ago
Using probabilistic model checking in systems biology
Probabilistic model checking is a formal verification framework for systems which exhibit stochastic behaviour. It has been successfully applied to a wide range of domains, includ...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
ISOLA
2010
Springer
13 years 7 months ago
A Memory Model for Static Analysis of C Programs
Automatic bug finding with static analysis requires precise tracking of different memory object values. This paper describes a memory modeling method for static analysis of C pro...
Zhongxing Xu, Ted Kremenek, Jian Zhang
ICSE
2003
IEEE-ACM
14 years 9 months ago
Sound Methods and Effective Tools for Engineering Modeling and Analysis
Modeling and analysis is indispensable in engineering. To be safe and effective, a modeling method requires a language with a validated semantics; feature-rich, easy-to-use, depen...
David Coppit, Kevin J. Sullivan