129 search results - page 10 / 26 » Formal performance evaluation of AMBA-based system-on-chip d... |
HPCA
2000
IEEE
14 years 9 hour ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
CAIP
2011
Springer
12 years 7 months ago
2011
Springer
Abstract. In depth map generation, the settings of the algorithm parameters to yield an accurate disparity estimation are usually chosen empirically or based on unplanned experimen...
ICSE
2005
IEEE-ACM
14 years 7 months ago
2005
IEEE-ACM
Developers of highly configurable performanceintensive software systems often use a type of in-house performance-oriented "regression testing" to ensure that their modif...
FMICS
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
EC
2010
13 years 7 months ago
2010
Perhaps the biggest limitation of interactive EC is the fitness evaluation bottleneck, caused by slow user evaluation and leading to small populations and user fatigue. In this st...