83 search results - page 16 / 17 » Formal synthesis and code generation of embedded real-time s... |
EMSOFT
2007
Springer
14 years 3 months ago
2007
Springer
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
LCTRTS
2010
Springer
13 years 7 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
RTAS
2005
IEEE
14 years 2 months ago
2005
IEEE
— Denial-of-service attacks are becoming more frequent and sophisticated. Researchers have proposed a variety of defenses, including better system configurations, infrastructure...
JSS
2010
13 years 3 months ago
2010
Architectural description languages are a useful tool for modeling complex systems at a high level of abstraction. If based on formal methods, they can also serve for enabling the...
CODES
2010
IEEE
13 years 7 months ago
2010
IEEE
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...