Sciweavers

105 search results - page 15 / 21
» Formal verification: is it real enough
Sort
View
SPIN
2000
Springer
13 years 11 months ago
The Temporal Rover and the ATG Rover
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
Doron Drusinsky
ECAI
2006
Springer
13 years 9 months ago
Solving Optimization Problems with DLL
Propositional satisfiability (SAT) is a success story in Computer Science and Artificial Intelligence: SAT solvers are currently used to solve problems in many different applicati...
Enrico Giunchiglia, Marco Maratea
CONSTRAINTS
2010
126views more  CONSTRAINTS 2010»
13 years 4 months ago
Solving satisfiability problems with preferences
Abstract. Propositional satisfiability (SAT) is a success story in Computer Science and Artificial Intelligence: SAT solvers are currently used to solve problems in many different ...
Emanuele Di Rosa, Enrico Giunchiglia, Marco Marate...
AINA
2007
IEEE
13 years 11 months ago
Verifying Identifier-Authenticity in Ubiquitous Computing Environment
In ubiquitous computing environment, identification of objects and places in the real world is important, and 2-D printing code is useful to store identifiers of them. However, si...
Tetsuo Kamina, Toshinori Aoki, Yoshiteru Eto, Nobo...
ITNG
2008
IEEE
14 years 1 months ago
A Minimalist Visual Notation for Design Patterns and Antipatterns
Achieving a quality software system requires UML designers a good understanding of both design patterns and antipatterns. Unfortunately, UML models for real systems tend to be huge...
Demis Ballis, Andrea Baruzzo, Marco Comini