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» Formal verification: is it real enough
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IWINAC
2009
Springer
14 years 1 months ago
Quality Checking of Medical Guidelines Using Interval Temporal Logics: A Case-Study
Computer-based decision support in health-care is becoming more and more important in recent years. Clinical Practise Guidelines are documents supporting health-care professionals ...
Guido Sciavicco, José M. Juárez, Man...
ASPDAC
2005
ACM
99views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Implication of assertion graphs in GSTE
- We address the problem of implication of assertion graphs that occur in generalized symbolic trajectory evaluation (GSTE). GSTE has demonstrated its powerful capacity in formal v...
Guowu Yang, Jin Yang, William N. N. Hung, Xiaoyu S...
JSW
2007
126views more  JSW 2007»
13 years 7 months ago
Supporting UML Sequence Diagrams with a Processor Net Approach
— UML sequence diagrams focus on the interaction between different classes. For distributed real time transaction processing it is possible to end up with complex sequence diagra...
Tony Spiteri Staines
DAC
2005
ACM
14 years 8 months ago
Efficient SAT solving: beyond supercubes
SAT (Boolean satisfiability) has become the primary Boolean reasoning engine for many EDA applications, so the efficiency of SAT solving is of great practical importance. Recently...
Domagoj Babic, Jesse D. Bingham, Alan J. Hu
POPL
2005
ACM
14 years 7 months ago
Context logic and tree update
Spatial logics have been used to describe properties of treelike structures (Ambient Logic) and in a Hoare style to reason about dynamic updates of heap-like structures (Separatio...
Cristiano Calcagno, Philippa Gardner, Uri Zarfaty