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» Formal verification: is it real enough
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FMCAD
2007
Springer
13 years 11 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...
EDOC
2000
IEEE
13 years 11 months ago
Model Checking of Workflow Schemas
Practical experience indicates that the definition of realworld workflow applications is a complex and error-prone process. Existing workflow management systems provide the means,...
Christos T. Karamanolis, Dimitra Giannakopoulou, J...
EKAW
1994
Springer
13 years 11 months ago
Evaluating a Formal Modelling Language
Formal knowledge modelling languages have a number of advantages over informal languages, such as their precise meaning and the possibility to derive propertiesthrough formal proof...
Fidel Ruiz, Frank van Harmelen, Manfred Aben, Joke...
ATAL
2005
Springer
14 years 28 days ago
Formal Modeling and Analysis of Organizations
A new, formal, role-based, framework for modeling and analyzing both real world and artificial organizations is introduced. It exploits static and dynamic properties of the organiz...
Egon L. van den Broek, Catholijn M. Jonker, Alexei...
FORMATS
2010
Springer
13 years 5 months ago
Robust Satisfaction of Temporal Logic over Real-Valued Signals
Abstract. We consider temporal logic formulae specifying constraints in continuous time and space on the behaviors of continuous and hybrid dynamical system admitting uncertain par...
Alexandre Donzé, Oded Maler