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ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
13 years 11 months ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim
BCSHCI
2007
13 years 8 months ago
Using formal models to design user interfaces: a case study
The use of formal models for user interface design can provide a number of benefits. It can help to ensure consistency across designs for multiple platforms, prove properties such...
Judy Bowen, Steve Reeves
IEEEPACT
2007
IEEE
14 years 1 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
ICSE
2007
IEEE-ACM
14 years 7 months ago
Randomized Differential Testing as a Prelude to Formal Verification
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...
Alex Groce, Gerard J. Holzmann, Rajeev Joshi
CCECE
2006
IEEE
14 years 1 months ago
A Formal CSP Framework for Message-Passing HPC Programming
To help programmers of high-performance computing (HPC) systems avoid communication-related errors, we employ a formal process algebra, Communicating Sequential Processes (CSP), w...
John D. Carter, William B. Gardner