299 search results - page 41 / 60 » Formal verification of analog designs using MetiTarski |
CSCWD
2009
Springer
14 years 2 months ago
2009
Springer
Constrained random simulation methodology still plays an important role in hardware verification due to the limited scalability of formal verification, especially for the large an...
FMCAD
2008
Springer
13 years 9 months ago
2008
Springer
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
FM
2008
Springer
13 years 9 months ago
2008
Springer
TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used fo...
ECLIPSE
2005
ACM
13 years 9 months ago
2005
ACM
In this paper we detail the design and implementation of an Eclipse plug-in for an integrated, model-based approach, to the engineering of web service compositions. The plug-in al...
ICFP
2005
ACM
14 years 7 months ago
2005
ACM
We describe a monadic interface to low-level hardware features that is a suitable basis for building operating systems in Haskell. The interface includes primitives for controllin...