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» Formal verification of analog designs using MetiTarski
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ESOP
2010
Springer
14 years 4 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker
ICECCS
2007
IEEE
120views Hardware» more  ICECCS 2007»
13 years 11 months ago
Verifying the CICS File Control API with Z/Eves: An Experiment in the Verified Software Repository
Parts of the CICS transaction processing system were modelled formally in the 1980s in a collaborative project between IBM Hursley Park and Oxford University Computing Laboratory....
Leo Freitas, Konstantinos Mokos, Jim Woodcock
MAGS
2008
169views more  MAGS 2008»
13 years 7 months ago
ACVisualizer: A visualization tool for APi-calculus
Process calculi are mathematical tools used for modeling and analyzing the structure and behavior of reactive systems. One such calculus, called APi-calculus (an extension to Pi-ca...
Raheel Ahmad, Shahram Rahimi
POPL
2005
ACM
14 years 7 months ago
Mutatis mutandis: safe and predictable dynamic software updating
Dynamic software updates can be used to fix bugs or add features to a running program without downtime. Essential for some applications and convenient for others, low-level dynami...
Gareth Stoyle, Michael W. Hicks, Gavin M. Bierman,...
HYBRID
2010
Springer
13 years 9 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...