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VLSID
2008
IEEE
225views VLSI» more  VLSID 2008»
14 years 10 months ago
Formal Verification of a Public-Domain DDR2 Controller Design
This paper demonstrates a formal verificationplanning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC o...
Abhishek Datta, Vigyan Singhal
ICFP
2003
ACM
14 years 9 months ago
A formalization of an Ordered Logical Framework in Hybrid with applications to continuation machines
We report on work in progress devoted to the formalization of an Ordered Logical Framework (OLF) based on a two-level architecture [8] in the Hybrid system. OLF here is a second-or...
Alberto Momigliano, Jeff Polakow
FDL
2004
IEEE
14 years 1 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 6 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
ACSD
1998
IEEE
105views Hardware» more  ACSD 1998»
14 years 2 months ago
Visual Formalisms Revisited
The development of an interactive application is a complex task that has to consider data, behavior, intercommunication, architecture and distribution aspects of the modeled syste...
Radu Grosu, Gheorghe Stefanescu, Manfred Broy